Each time I'm building something, it reminds me how crappy the models we are "working" with are.
The current through the VAS was about double of that simulated. After lowering the current through the VAS to 7.7mA (replaced the D15 and D16 zeners with 12V, lowered R24 and R86) now the thing stabilizes at about 140mA (28mV across the emitter resistors, which is about right). As expected this thing dissipates well over 100W in idle, the heatsink is at 60-70 degs, so forced cooling will be mandatory. I don't like the idea, but I should probably increase a little the Vbe multiplier ratio and further lower the VAS current to 5mA.
One to another, Bob's idea for biasing is well undercompensated (at least for 10mA through the VAS). Not sure if this thermal compensation was ever tried before in the real world (it was simulating ok) and not sure what the root cause is. Either the 2SC5171/2SA1930 drivers have an unusual high tempco, or the diode and NJL models are way off? I'll eventually try to find out. Anyway, I was much happier with the Sansui style bias compensation that I was using in the VSOP amp.
Quick test with signal into 4ohm load. At almost 400W in the load, just before clipping, THD20=130ppm before even rerouting the power and load cables for a THD20 minimum, this is encouraging, it will certainly go well under 100ppm after the cabling is optimized. The good news is that after a couple of minutes at full power the bias stays solid (I would prefer it a little overcompensated though). Clipping is nice, not as nice as an active clamp, but the sticking is minimum.
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Unfortunately I forgot and installed the input RFI filter (680ohm/150pF) right away, so I don't know the real SR. The step response is though excellent and (as expected) clearly dominated by the input filter.
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EDIT: Now, to put together some fans for cooling this beast (and the load) and then do some serious measurements.